Online TSV health monitoring and built-in self-repair to overcome aging

TSV redundancy and reconfiguration in 3D-ICs is a well-known method for overcoming TSV manufacturing faults. However, additional post-manufacturing faults can manifest over the lifetime of the chip due to aging effects such as electromigration and thermal cycling. This paper presents a scheme which leverages the existing reconfiguration infrastructure and unused redundant TSVs to overcome runtime faults caused by aging. Failures due to aging faults are predicted by tracking the degree of degradation on each TSV over time, allowing reconfiguration to occur before failure actually occurs. The experimental results reported in this paper indicate that the proposed tracking scheme presented in this work can lead to a 13.8% increase in MTTF of the simulated circuit, while maintaining a sampling rate of less than one sample per week.