Title :
Online TSV health monitoring and built-in self-repair to overcome aging
Author :
Serafy, Caleb ; Srivastava, Anurag
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Maryland, College Park, MD, USA
Abstract :
TSV redundancy and reconfiguration in 3D-ICs is a well-known method for overcoming TSV manufacturing faults. However, additional post-manufacturing faults can manifest over the lifetime of the chip due to aging effects such as electromigration and thermal cycling. This paper presents a scheme which leverages the existing reconfiguration infrastructure and unused redundant TSVs to overcome runtime faults caused by aging. Failures due to aging faults are predicted by tracking the degree of degradation on each TSV over time, allowing reconfiguration to occur before failure actually occurs. The experimental results reported in this paper indicate that the proposed tracking scheme presented in this work can lead to a 13.8% increase in MTTF of the simulated circuit, while maintaining a sampling rate of less than one sample per week.
Keywords :
built-in self test; condition monitoring; integrated circuit manufacture; integrated circuit testing; maintenance engineering; three-dimensional integrated circuits; tracking; 3D-IC reconfiguration; MTTF; TSV manufacturing faults; TSV redundancy; built-in self-repair; electromigration cycling; online TSV health monitoring; post-manufacturing faults; reconfiguration infrastructure; thermal cycling; tracking scheme; Aging; Degradation; Delays; Manufacturing; Monitoring; Resistance; Through-silicon vias;
Conference_Titel :
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2013 IEEE International Symposium on
Conference_Location :
New York City, NY
Print_ISBN :
978-1-4799-1583-5
DOI :
10.1109/DFT.2013.6653610
