DocumentCode :
2052951
Title :
A low-complexity noise removal technique and its hardware implementation
Author :
Matsubara, Takeaki ; Moshnyaga, Vasily G. ; Hashimoto, Koji
Author_Institution :
Dept. of Electron. Eng. & Comput. Sci., Fukuoka Univ., Fukuoka, Japan
fYear :
2010
fDate :
21-24 Nov. 2010
Firstpage :
716
Lastpage :
719
Abstract :
Impulse noise removal is a very important preprocessing operation in many computer vision applications. This paper presents a noise removal approach based on a simple conditional technique. As evaluations show, the presented technique performs significantly better than standard median filter and achieves superior image quality. Experimental FPGA implementation of the proposed technique for window size of (3 × 3) pixels is compact, fast and consumes low-power.
Keywords :
computer vision; field programmable gate arrays; median filters; FPGA implementation; computer vision applications; field programmable gate array; image quality; impulse noise removal; median filter; noise removal technique; FPGA implementation; Impulse noise; image processing; median filter;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
TENCON 2010 - 2010 IEEE Region 10 Conference
Conference_Location :
Fukuoka
ISSN :
pending
Print_ISBN :
978-1-4244-6889-8
Type :
conf
DOI :
10.1109/TENCON.2010.5686617
Filename :
5686617
Link To Document :
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