Title :
A smart Trojan circuit and smart attack method in AES encryption circuits
Author :
Yoshimura, Masashi ; Ogita, Amy ; Hosokawa, T.
Author_Institution :
Grad. Sch. of Inf. Sci. & Electr. Eng., Kyushu Univ., Fukuoka, Japan
Abstract :
The increased utilization of outsourcing services for designing and manufacturing LSIs can reduce the reliability of LSIs. Trojan circuits are malicious circuits that can leak secret information. In this paper, we propose a Trojan circuit whose detection is difficult in AES circuits. To make it difficult to detect the proposed Trojan circuit, we propose two methods. In one method, one of test mode signal lines not used in normal operation is included in the activation conditions on the trigger unit. In the other, the payload unit does not directly leak the cipher key of an AES circuit but instead leaks information related to the cipher key. We also propose a procedure to obtain the secret key from the information. We demonstrate that it is difficult to detect the proposed Trojan circuit by using existing approaches. We show results to implement and to estimate the area and power of AES circuits with and without the proposed Trojan circuit.
Keywords :
cryptography; fault diagnosis; integrated circuit design; integrated circuit reliability; integrated circuit testing; invasive software; large scale integration; AES encryption circuits; LSI design; LSI manufacturing; LSI reliability; Trojan circuit detection; cipher key; malicious circuits; outsourcing services; payload unit; secret information leak; secret key; smart Trojan circuit; smart attack method; test mode signal lines; trigger unit; Clocks; Discrete Fourier transforms; AES Encryption Circuits; Design-for-Testability; Secure Design; Trojan Circuit;
Conference_Titel :
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2013 IEEE International Symposium on
Conference_Location :
New York City, NY
Print_ISBN :
978-1-4799-1583-5
DOI :
10.1109/DFT.2013.6653619