Title :
Online Testing for Three Fault Models in Reversible Circuits
Author :
Nashiry, Md Asif ; Bhaskar, Gite Gaurav ; Rice, Jacqueline E.
Author_Institution :
Dept. of Math & Comput. Sci., Univ. of Lethbridge, Lethbridge, AB, Canada
Abstract :
In this paper we propose an approach for the design of online testable reversible circuits. A reversible circuit composed of Toffoli gates can be made online testable by adding two sets of CNOT gates and a single parity line. The performance of the proposed approach for detecting a single bit fault, a cross point fault and the family of missing gate faults has been observed. Discussion around the correctness of our approach and the overhead is also provided.
Keywords :
fault tolerance; logic gates; logic testing; CNOT gates; Toffoli gates; crosspoint fault; fault models; gate faults; online testable reversible circuits; online testing; single bit fault; single parity line; Adders; Circuit faults; Electronic mail; Integrated circuit modeling; Logic gates; Testing; Tin; Toffoli gates; crosspoint faults; missing gate faults; online testing; reversible logic; single bit faults;
Conference_Titel :
Multiple-Valued Logic (ISMVL), 2015 IEEE International Symposium on
Conference_Location :
Waterloo, ON
DOI :
10.1109/ISMVL.2015.36
