Title :
A unifying methodology for intellectual property and custom logic testing
Author :
Bhatia, Sandeep ; Gheewala, Tushar ; Varma, Prab
Author_Institution :
CrossCheck Technol. Inc., San Jose, CA, USA
Abstract :
A novel direct access test methodology that unifies the testing of pre-designed intellectual property blocks and custom user designed logic is proposed. This methodology allows the test logic and wiring used for testing custom logic to be shared for testing intellectual property using pre-computed test vectors. It provides parallel access to storage elements and so alleviates some of the issues found in serial access scan techniques. It also provides a novel solution to the non-scan element state retention problem found in single edge-triggered clock based serial scan approaches
Keywords :
application specific integrated circuits; automatic testing; boundary scan testing; clocks; design for testability; fault diagnosis; industrial property; logic testing; custom logic testing; custom user designed logic; direct access test methodology; edge-triggered clock based serial scan; element state retention problem; intellectual property; parallel access; serial access scan techniques; test logic; test vectors; Built-in self-test; Circuit testing; Clocks; Degradation; Design for testability; Intellectual property; Logic design; Logic testing; Product development; Wiring;
Conference_Titel :
Test Conference, 1996. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-3541-4
DOI :
10.1109/TEST.1996.557121