Title :
System for Automatic Generation of Parallel Multipliers over Galois Fields
Author :
Sugawara, Yukihiro ; Ueno, Rei ; Homma, Naofumi ; Aoki, Takafumi
Author_Institution :
Grad. Sch. of Inf. Sci., Tohoku Univ., Sendai, Japan
Abstract :
This paper presents a system for the automatic generation of Galois-field (GF) arithmetic circuits, named the GF Arithmetic Module Generator (GF-AMG). The proposed system employs a graph-based circuit description called the GF Arithmetic Circuit Graph (GF-ACG). First, we present an extension of the GF-ACG to handle GF(pm) (p ≥ 3) arithmetic circuits, which can be efficiently implemented by multiple-valued logic circuits in addition to the conventional binary circuits. We then show the validity of the generation system through the experimental design of GF(3m) multipliers for a ternary logic circuit. In addition, we evaluate the performance of typical GF(2m) multipliers empirically generated by our system. We confirm from the results that the proposed system can generate a variety of GF parallel multipliers, including practical multipliers over GF(2m) and GF(3m) having degrees greater than 128.
Keywords :
Galois fields; graph theory; multiplying circuits; multivalued logic circuits; GF arithmetic circuit graph; GF arithmetic module generator; GF-ACG; GF-AMG; automatic GF arithmetic circuit generation; automatic Galois-field arithmetic circuit generation; automatic parallel multiplier generation system; binary circuits; experimental design; graph-based circuit description; multiple-valued logic circuits; ternary logic circuit; Adders; Encoding; Erbium; Generators; Hardware design languages; IP networks; Synthesizers; GF arithmetic circuit; automatic generation; formal design; multiple-valued logic; parallel multipliers;
Conference_Titel :
Multiple-Valued Logic (ISMVL), 2015 IEEE International Symposium on
Conference_Location :
Waterloo, ON
DOI :
10.1109/ISMVL.2015.15