• DocumentCode
    2053845
  • Title

    Fredkin-Enabled Transformation-Based Reversible Logic Synthesis

  • Author

    Soeken, Mathias ; Chattopadhyay, Anupam

  • Author_Institution
    Dept. of Math. & Comput. Sci., Univ. of Bremen, Bremen, Germany
  • fYear
    2015
  • fDate
    18-20 May 2015
  • Firstpage
    60
  • Lastpage
    65
  • Abstract
    Reversible computation is gaining increasing relevance in the context of several post-CMOS technologies, the most prominent of those being quantum computing. The problem of implementing a given Boolean function using a set of elementary reversible logic gates is known as reversible logic synthesis. Due to the presumed hardness of the reversible circuit synthesis problem, different heuristics have been proposed in the literature to reduce quantum cost (QC), gate count, and logical depth without using ancillary lines. Interestingly, none of these heuristics systematically utilize Fredkin gates. In this paper, we demonstrate, both theoretically and empirically, that accommodating Fredkin gates significantly improves the performance of reversible circuits.
  • Keywords
    Boolean functions; logic design; quantum gates; Boolean function; Fredkin gates; Fredkin-enabled transformation-based reversible logic synthesis; QC reduction; elementary reversible logic gates; gate count reduction; heuristics; logical depth reduction; performance improvement; quantum cost reduction; reversible circuit synthesis problem; Benchmark testing; Bidirectional control; Boolean functions; Libraries; Logic gates; Optimization; Upper bound; Reversible logic; Synthesis; Upper bounds;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Multiple-Valued Logic (ISMVL), 2015 IEEE International Symposium on
  • Conference_Location
    Waterloo, ON
  • ISSN
    0195-623X
  • Type

    conf

  • DOI
    10.1109/ISMVL.2015.37
  • Filename
    7238133