DocumentCode :
2053900
Title :
On measuring the performance of adaptive wormhole routing
Author :
Schwiebert, Loren ; Jayasimha, D.N.
Author_Institution :
Dept. of Electr. & Comput. Eng., Wayne State Univ., Detroit, MI, USA
fYear :
1997
fDate :
18-21 Dec 1997
Firstpage :
336
Lastpage :
341
Abstract :
Adaptive routing is widely regarded as a promising approach to improving interconnection network performance. Many designers of adaptive routing algorithms have used synthetic communication patterns, such as uniform and transpose traffic, to compare the performance of various adaptive routing algorithms with each other and with oblivious routing. These comparisons have shown that the average message latency is usually lower with adaptive routing. On the other hand, when a parallel program is executed on a multiprocessor the goal is to reduce the total execution time. We explain why improving the average message latency of a routing algorithm does not necessarily lead to a lower execution time for real applications. We support this observation by reporting simulation results for both adaptive and oblivious routing using communication derived from real applications. Specifically, we report the performance of various routing algorithms for directed acyclic graphs (DAGs) derived from the Cholesky factorization of sparse matrices. Our results show that there is little correlation between average message latency and the total execution time of a parallel program. Hence, average message latency does not seem to be a useful measure of the performance of a routing algorithm. This strongly suggests that current comparisons of routing algorithms do not provide a reliable indication of the performance improvements to be realized by executing programs on a multiprocessor with such a routing algorithm. We interpret these results and suggest several alternatives for further research
Keywords :
directed graphs; matrix decomposition; message switching; multiprocessing systems; multiprocessor interconnection networks; network routing; parallel architectures; parallel programming; performance evaluation; sparse matrices; Cholesky factorization; adaptive wormhole routing performance; algorithm performance; directed acyclic graphs; execution time; interconnection network performance; message latency; multiprocessor; oblivious routing; parallel program; simulation; sparse matrices; transpose traffic; uniform traffic; Algorithm design and analysis; Buffer storage; Delay; Hardware; Information science; Large-scale systems; Multiprocessor interconnection networks; Routing; Sparse matrices;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High-Performance Computing, 1997. Proceedings. Fourth International Conference on
Conference_Location :
Bangalore
Print_ISBN :
0-8186-8067-9
Type :
conf
DOI :
10.1109/HIPC.1997.634512
Filename :
634512
Link To Document :
بازگشت