DocumentCode :
2054331
Title :
A VSC-HVDC model with reduced computational intensity
Author :
Moustafa, M.M.Z. ; Filizadeh, S.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Manitoba, Winnipeg, MB, Canada
fYear :
2012
fDate :
22-26 July 2012
Firstpage :
1
Lastpage :
6
Abstract :
The paper presents a simplified voltage-source converter (VSC) model to reduce the computational intensity of simulating a power system with embedded converters. This simplified model is based on the concept of dynamic average-value modeling and provides the ability to generate either the full spectrum or the fundamental-frequency component of the VSC voltage. The model is validated against a detailed model of a voltage-source converter based high voltage direct current (VSC-HVDC) circuit and shows accurate matching during steady state and transient operation. Simulation and validation results are obtained using an electromagnetic transient simulation program (PSCAD/EMTDC). A significant reduction in terms of central processing unit (CPU) time consumption is also achieved with the proposed models.
Keywords :
CAD; EMTP; HVDC power convertors; power engineering computing; power system simulation; CPU; PSCAD-EMTDC; VSC-HVDC model; central processing unit; computational intensity reduction; dynamic average-value modeling; electromagnetic transient simulation program; embedded converters; full spectrum; fundamental-frequency component; high voltage direct current circuit; power system simulation; transient operation; Circuit faults; Computational modeling; HVDC transmission; Integrated circuit modeling; Power conversion; Reactive power; Converter; VSC-HVDC; computational time; dynamic average value;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power and Energy Society General Meeting, 2012 IEEE
Conference_Location :
San Diego, CA
ISSN :
1944-9925
Print_ISBN :
978-1-4673-2727-5
Electronic_ISBN :
1944-9925
Type :
conf
DOI :
10.1109/PESGM.2012.6345135
Filename :
6345135
Link To Document :
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