DocumentCode
2054989
Title
The effect of period generation techniques on period resolution and waveform jitter in VLSI test systems
Author
Davis, Michael G.
Author_Institution
LTX/Trillium, San Jose, CA, USA
fYear
1996
fDate
20-25 Oct 1996
Firstpage
685
Lastpage
690
Abstract
This paper presents a comparison of three approaches to achieving period resolution in VLSI test systems. It explains the strengths and weaknesses of each approach, from the user´s point of view, with an emphasis on the jitter produced by each approach
Keywords
VLSI; automatic testing; clocks; integrated circuit testing; jitter; phase locked loops; waveform generators; HF clock; PLL; VLSI test systems; flip-flip; flying adder method; period averaging; period generation techniques; period resolution; test rate; tester periods; timing generators; variable frequency clock; vernier linearity; waveform jitter; Clocks; Control systems; Counting circuits; Frequency; Jitter; Phase locked loops; Pulse generation; System testing; Timing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1996. Proceedings., International
Conference_Location
Washington, DC
ISSN
1089-3539
Print_ISBN
0-7803-3541-4
Type
conf
DOI
10.1109/TEST.1996.557126
Filename
557126
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