Title :
On ΔΣ fractional-N frequency synthesizers
Author :
Zarkeshvari, Farhad ; Noel, Peter ; Kwasniewski, Tad
Author_Institution :
Dept. of Electron., Carleton Univ., Ottawa, Ont., Canada
Abstract :
ΔΣ fractional-N frequency synthesis achieves low phase noise performance while relaxing the phase-locked loop (PLL) design constraints and reduces the desired channel spacing. This paper reviews the recent advanced techniques on the implementation of fractional-N frequency synthesizers and discusses their advantages and disadvantages. It also addresses the design options and the associated trade-offs.
Keywords :
frequency synthesizers; phase locked loops; phase noise; sigma-delta modulation; ΔΣ fractional-N frequency synthesizers; channel spacing; phase noise; phase-locked loop design constraints; 1f noise; Bandwidth; Chirp modulation; Circuit noise; Filters; Frequency synthesizers; Noise reduction; Phase noise; Quantization; Signal to noise ratio;
Conference_Titel :
Signals, Circuits and Systems, 2005. ISSCS 2005. International Symposium on
Print_ISBN :
0-7803-9029-6
DOI :
10.1109/ISSCS.2005.1511289
