Title :
Test point insertion for an area efficient BIST
Author :
Schotten, Claw ; Meyr, Heinrich
Author_Institution :
Inst. for Int. Syst. in Signal Process., Aachen Univ. of Technol., Germany
Abstract :
We present a new cost based method for the insertion of test points into sequential circuits. It is especially suited for the design of an area efficient BIST using pseudorandom patterns. Testability analysis is used to detect areas of poor testability and estimate the benefit of test points. The designer can trade this benefit against increased area. Experimental results show that small sets of test points are sufficient to reach a fault coverage greater than 99%
Keywords :
automatic testing; built-in self test; design for testability; integrated circuit testing; logic testing; sequential circuits; area efficient BIST; cost based method; fault coverage; pseudorandom patterns; sequential circuits; test point insertion; testability analysis; Automatic testing; Built-in self-test; Circuit faults; Circuit simulation; Circuit testing; Compaction; Costs; Logic testing; Sequential circuits; Test pattern generators;
Conference_Titel :
Test Conference, 1995. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-2992-9
DOI :
10.1109/TEST.1995.529879
