Title :
IC reliability simulation
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Abstract :
The motivation, challenges, and status of IC reliability simulation are discussed. The reliability simulator BERT (Berkeley Reliability Tool) is used to illustrate the physical models and approaches used to simulate the hot electron effect, oxide time-dependent breakdown, electromigration, and bipolar transistor gain degradation
Keywords :
circuit reliability; digital simulation; electric breakdown of solids; electromigration; electronic engineering computing; failure analysis; hot carriers; integrated circuit technology; monolithic integrated circuits; semiconductor device models; BERT; Berkeley Reliability Tool; IC reliability simulation; bipolar transistor gain degradation; electromigration; hot electron effect; oxide time-dependent breakdown; physical models; Bit error rate; Circuit simulation; Circuit testing; Computational modeling; Degradation; Electromigration; Electrons; Failure analysis; Integrated circuit modeling; Integrated circuit reliability;
Conference_Titel :
Custom Integrated Circuits Conference, 1991., Proceedings of the IEEE 1991
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-0015-7
DOI :
10.1109/CICC.1991.163989
