DocumentCode :
2058554
Title :
FPGA implementations evaluation of a vectorial quantifier for speech classification
Author :
Pop, Mircea Ioan ; Biarge, Victoria Rodellar ; Concejero, Coral González ; Borda, Monica
Author_Institution :
Cluj Tech. Univ., Napoca, Romania
Volume :
2
fYear :
2005
fDate :
14-15 July 2005
Firstpage :
645
Abstract :
In this paper we present sequential, parallel and pipeline structures for the computation of a vectorial quantifier that may be used as a classifier in speech recognition systems. The structures are modeled in VHDL and can be used as embedded cores in different designs. The models have been implemented by FPGAs and the hardware demands on resources, frequency and power dissipation have also been evaluated.
Keywords :
field programmable gate arrays; hardware description languages; logic design; parallel architectures; pipeline processing; speech coding; speech recognition; vector quantisation; FPGA implementation; VHDL; parallel structure; pipeline structure; sequential structure; speech classification; speech coding; speech recognition systems; vectorial quantifier; Cepstral analysis; Data compression; Distortion measurement; Field programmable gate arrays; Image storage; Noise cancellation; Power dissipation; Power system modeling; Spectral analysis; Speech analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Circuits and Systems, 2005. ISSCS 2005. International Symposium on
Print_ISBN :
0-7803-9029-6
Type :
conf
DOI :
10.1109/ISSCS.2005.1511323
Filename :
1511323
Link To Document :
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