DocumentCode
2058793
Title
An improved high performance CMOS second generation current conveyor
Author
Bensalem, S. ; Fakhfakh, M. ; Loulou, M. ; Masmoud, N.
Author_Institution
Lab. de L´´Electronique et des Technol. de l´´Information, Sfax Nat. Eng. Sch., Tunisia
Volume
2
fYear
2005
fDate
14-15 July 2005
Firstpage
693
Abstract
This paper deals with optimally sizing CMOS current conveyors. Both static and dynamic performances are improved. Current conveyor performances are improved thanks to an objective function which minimizes Rx input resistance, noise effects and occupied area. Also, it maximizes Ry, Rz output resistances and both voltage and current bandwidths. The ameliorated optimized structure presents very good performances: 2.6GHz and 3.9 GHz as current and voltage band width respectively and 18Ω as Rx input port resistance value. PSPICE software simulation results are presented showing obtained results.
Keywords
CMOS analogue integrated circuits; circuit optimisation; current conveyors; 18 ohm; 2.6 GHz; 3.9 GHz; CMOS second generation current conveyor; circuit optimization; optimal sizing; Bandwidth; CMOS technology; Circuit simulation; Current mode circuits; Dynamic range; Equations; Impedance; SPICE; Voltage; Wideband;
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Circuits and Systems, 2005. ISSCS 2005. International Symposium on
Print_ISBN
0-7803-9029-6
Type
conf
DOI
10.1109/ISSCS.2005.1511335
Filename
1511335
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