Title :
Chaos-based computation via Chua´s circuit: parallel computing with application to the SR flip-flop
Author :
Cafagna, D. ; Grassi, G.
Author_Institution :
Dipt. Ingegneria Innovazione, Univ. di Lecce, Italy
Abstract :
This paper deals with chaos-based computing, that is, the exploitation of chaos to do flexible computations. In particular, this paper illustrates the parallel implementation of two combinatorial logic gates using a single Chua´s circuit. Furthermore, a novel chaos-based sequential gate that behaves like the SR flip-flop is introduced.
Keywords :
Chua´s circuit; chaos; combinational circuits; flip-flops; logic gates; Chua circuit; SR flip-flops; chaos-based computation; chaos-based computing; combinatorial logic gates; parallel computing; sequential gates; Chaos; Circuits and systems; Concurrent computing; Flexible printed circuits; Flip-flops; Logic circuits; Logic devices; Logic gates; Parallel processing; Strontium;
Conference_Titel :
Signals, Circuits and Systems, 2005. ISSCS 2005. International Symposium on
Conference_Location :
Iasi, Romania
Print_ISBN :
0-7803-9029-6
DOI :
10.1109/ISSCS.2005.1511349
