• DocumentCode
    2059629
  • Title

    Transient scheduling of single armed cluster tools: Algorithms for wafer residency constraints

  • Author

    Hong-Yue Jin ; Morrison, James R.

  • Author_Institution
    Dept. of Ind. & Syst. Eng., KAIST, Daejeon, South Korea
  • fYear
    2013
  • fDate
    17-20 Aug. 2013
  • Firstpage
    856
  • Lastpage
    861
  • Abstract
    The wafer handling robot actions in cluster tools used for semiconductor manufacturing should serve to maximize throughput while maintaining good wafer quality. Since excessive delay in a process chamber may cause deterioration in wafer quality, wafer delays should be maintained in an acceptable range, or preferably, should be minimized. We focus on addressing these concerns for all wafers in a lot, including those in both the transient and possibly cyclic regime. As the general problem is computationally complex, we first assume that the robot sequence is given and develop a multistage linear programming (LP) model to minimize the total makespan, subject to wafer residency constraints, and subsequently the average delay. Forging into less tractable territory, we next develop a branch and bound algorithm to find an optimal robot sequence with minimum wafer delay. This approach enables us to solve problems that were not previously solvable. Simulation studies demonstrate that when the number of process modules grows to more than five, the branch and bound algorithm may fail to find an optimal solution due to computational complexity. In this case, we suggest a transient sequence based on cyclic policies together with the LP model; it is within 2% of optimal.
  • Keywords
    computational complexity; delays; dexterous manipulators; industrial manipulators; linear programming; scheduling; semiconductor industry; semiconductor technology; tree searching; LP model; average delay minimization; branch-and-bound algorithm; computational complexity; cyclic policies; minimum wafer delay; multistage linear programming model; optimal robot sequence; optimal solution; process chamber delay; semiconductor manufacturing; single-armed cluster tools; throughput maximization; total makespan minimization; transient scheduling; transient sequence; wafer handling robot; wafer quality; wafer residency constraint algorithms; wafer residency constraints; Delays; Linear programming; Robots; Semiconductor device modeling; Steady-state; Transient analysis; Upper bound; branch and bound; cluster tool; linear programming; transient state; wafer delay constraint;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Automation Science and Engineering (CASE), 2013 IEEE International Conference on
  • Conference_Location
    Madison, WI
  • ISSN
    2161-8070
  • Type

    conf

  • DOI
    10.1109/CoASE.2013.6653901
  • Filename
    6653901