• DocumentCode
    2059778
  • Title

    An iterative technique for calculating aliasing probability of linear feedback signature registers

  • Author

    Ivanov, A. ; Agarwal, V.K.

  • Author_Institution
    Dept. of Electr. Eng., McGill Univ., Montreal, Que., Canada
  • fYear
    1988
  • fDate
    27-30 June 1988
  • Firstpage
    70
  • Lastpage
    75
  • Abstract
    An iterative technique for computing the exact probability of aliasing for any linear feedback signature register (i.e. characterized by any feedback polynomial, for any constant probability of error, and for any test length) is proposed. The technique is also applicable to a more general model of the aliasing problem wherein the probability of error may vary with each output bit. The complexity of the technique enables registers of lengths of interest in practice, e.g. 16, to be analyzed readily.<>
  • Keywords
    automatic testing; feedback; iterative methods; logic testing; aliasing probability; feedback polynomial; iterative technique; linear feedback signature registers; Analytical models; Automatic testing; Built-in self-test; Circuit faults; Circuit simulation; Circuit testing; Compaction; Feedback; Probability; Registers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Fault-Tolerant Computing, 1988. FTCS-18, Digest of Papers., Eighteenth International Symposium on
  • Conference_Location
    Tokyo, Japan
  • Print_ISBN
    0-8186-0867-6
  • Type

    conf

  • DOI
    10.1109/FTCS.1988.5299
  • Filename
    5299