A Hardware Threat Modeling Concept for Trustable Integrated Circuits

Similar to the effects of software viruses, hardware can also be compromised by introduction of malicious logic into circuits to cause unwanted system behaviors. This can be done by changing or adding internal logic, in such a way that it is undetectable using traditional testing and verification tools and techniques. Therefore, the user of the circuit needs to decide whether it can be trusted, i.e., it only performs functions defined in the original circuit specification (no more and no less), before employing it in the system. In this paper, a preliminary methodology is proposed to model potential hardware threats in order to determine a circuit´s trustability and provide guidance to malicious-logic checking tools.