Abstract :
With the growing use of surface mount technologies, continued reduction of lead spacing for mounting IC devices on circuit boards, and the increase in pin counts on packages well into the hundreds for many of today´s complex ASICs, the probability for faults to exist goes up dramatically. Conversely, the ability for conventional in-circuit functional test techniques to effectively detect, let alone isolate, these faults is just as dramatically going down. A vectorless test technique has been developed that uses a simple transistor test to detect and isolate I/O related faults on all types of ICs, from simple devices to complex ASICs
Keywords :
application specific integrated circuits; fault location; integrated circuit testing; ASIC; I/O faults; complex ASIC; conventional in-circuit functional test; in-circuit IC; mounting; packages; parasitic transistor tests; pin counts; probability; surface mount technologies; transistor test; vectorless test; Circuit faults; Circuit testing; Costs; Current measurement; Electrical fault detection; Fault detection; Integrated circuit testing; Lifting equipment; Performance evaluation; Pins;
