DocumentCode
2060687
Title
Capacitive leadframe testing
Author
Turner, Ted T.
Author_Institution
Manuf. Test Div., Hewlett-Packard Co., USA
fYear
1995
fDate
21-25 Oct 1995
Firstpage
928
Abstract
Pin-level diagnosis of open solder joints allows manufacturers to tune SMT process for maximum output. Repair time and repair-induced damage are both significantly reduced with pin-level diagnostics. Detection of misoriented capacitors prevents expensive and reputation-damaging field failures. Ability to test both sides of PCB´s allows maximum fault coverage
Keywords
application specific integrated circuits; fault diagnosis; printed circuit testing; surface mount technology; ASIC; PCB; SMT process; capacitive leadframe testing; fault coverage; field failure; misoriented capacitors; open solder detection; pin-level diagnosis; pin-level diagnostics; repair time; repair-induced damage; Capacitors; Circuit faults; Circuit testing; Connectors; Fixtures; Lead; Life testing; Manufacturing; Soldering; Surface-mount technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Conference, 1995. Proceedings., International
Conference_Location
Washington, DC
ISSN
1089-3539
Print_ISBN
0-7803-2992-9
Type
conf
DOI
10.1109/TEST.1995.529937
Filename
529937
Link To Document