Testing a switching memory in a telecommunication system

Author

Barbagallo, S. ; Corno, F. ; Prinetto, P. ; Reorda, M. Sonza

Author_Institution

R&D Labs., Italtel Soc. Italiana Telecommun. SpA, Milan, Italy

fYear

1995

fDate

21-25 Oct 1995

Firstpage

947

Lastpage

956

Abstract

The paper describes the approach followed for testing a real circuit produced by Italtel. Both on-line and off-line testing are considered and the performance and area overheads are taken into account to meet the constraints imposed by the circuit customers. BIST is adopted to test some embedded memories, and boundary scan is exploited to activate the test and gather the results. Particular care is taken to minimize the additional logic, by using the same circuitry for both on-line and off-line testing

Keywords

automatic testing; boundary scan testing; built-in self test; fault diagnosis; inspection; integrated memory circuits; production testing; random-access storage; telecommunication equipment testing; BIST; Italtel; area overheads; boundary scan; command memory; embedded memories; inspection; logic; off-line testing; online testing; speech memory; switching memory; telecommunication system; test logic overhead; test protocol; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Delay; Hardware; Logic testing; Switching circuits; System testing; Telecommunication switching;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Conference, 1995. Proceedings., International

Conference_Location

Washington, DC

ISSN

1089-3539

Print_ISBN

0-7803-2992-9

Type

conf

DOI

10.1109/TEST.1995.529941

Filename

529941