DocumentCode
2061256
Title
Hiding latency through bulk transfer and prefetching in distributed shared memory multiprocessors
Author
Roh, Yangwoo ; Seong, Byeong Hag ; Park, Daeyeon
Author_Institution
Korea Adv. Inst. of Sci. & Technol., Taejon, South Korea
Volume
1
fYear
2000
fDate
14-17 May 2000
Firstpage
164
Abstract
Distributed shared memory (DSM) machines provide the shared memory paradigm and achieve high performance by the caching of shared data. However, they suffer from cache miss and remote access latency with coarse-grain patterns. In this paper we suggest the combination of bulk transfer and prefetching as a new latency hiding technique in DSM machines. The purpose of bulk transfer is to replicate remote data into local memory and thus reduce remote accesses. Adaptive granularity was used for bulk transfer. Prefetching is added to fetch replicated data to the cache at the right time. We could apply simple prefetch scheduling as in uniprocessors since bulk transfer converts remote accesses into local ones. Simulation results show the reduced latency and the potential of AG as a preferable architecture for prefetching in DSM machines.
Keywords
cache storage; distributed shared memory systems; virtual machines; adaptive granularity; bulk transfer; cache miss; coarse-grain patterns; distributed shared memory multiprocessors; latency hiding; local memory; prefetching; remote access latency; remote data replication; shared data caching; simulation;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computing in the Asia-Pacific Region, 2000. Proceedings. The Fourth International Conference/Exhibition on
Conference_Location
Beijing, China
Print_ISBN
0-7695-0589-2
Type
conf
DOI
10.1109/HPC.2000.846540
Filename
846540
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