Title :
Optimization processing unit (OPU) applied to integrated circuit design and manufacturing
Author :
Chen, Don C. L. ; Tzeng, Jerome T. ; Scott, David B. ; Peng, S.W. ; Shen, M.H. ; Sio, K.T. ; Narayanasetti, Praneeth
Author_Institution :
TPLAD/DTP, Taiwan Semicond. Manuf. Co. (tsmc), Hsinchu, Taiwan
Abstract :
The authors proposed a general purpose parameter optimizer, Optimization Processing Unit (OPU), which can handle multi-objective parameter optimization in a multi-input multi-output (MIMO) system (applying parameter optimization to a system implies that it is a functional system). Practical computer-aided methods are used to avoid the difficulty of deriving equations that are usually required for system modeling. For multi-objective optimization, OPU only needs the known data of the system input, the corresponding output data, the objectives, the tolerances of objectives, and required fitting accuracy of the system approximation. In current practice, singular points are avoided or limited. Hence, we demonstrate OPU can handle all the field parameter optimization by its very nature. OPU includes four sub-units: Data-adjusted Automatic Taylor Expansion Unit, Tolerance and Constraint Adjustment Unit, Accuracy and Result Self-confirm Unit, and Automatic Optimizer. The fully automatic flow of optimization by OPU has been proposed in this paper. The optimizer applied simulated annealing algorithm [1]-[2] together with dynamic energy threshold and weighted sum method [3]. An Algorithm of Data-adjusted Automatic Taylor Expansion Unit is proposed to translate the system input data and corresponding output to system equations in a Taylor Series format. In addition, the tolerance and constraint adjustment method in OPU was presented. This OPU has been verified and reduced to practice through performance estimation of circuits for various transistor device indexes by using the BSIM4 [4] and BSIM-CMG [5] modeling optimization system. A Vdd-Vth (Vdd: operation voltage, Vth: threshold voltage) driven relation was used to co-optimizes both design and process for logic circuit power minimization.
Keywords :
MIMO systems; circuit CAD; integrated circuit design; integrated circuit manufacture; optimisation; BSIM-CMG modeling optimization; BSIM4 modeling optimization; computer-aided methods; data-adjusted automatic Taylor expansion unit; dynamic energy threshold; field parameter optimization; integrated circuit design; integrated circuit manufacturing; logic circuit power minimization; multiinput multioutput system; multiobjective parameter optimization; optimization processing unit; simulated annealing algorithm; transistor device indexes; weighted sum method; Accuracy; Equations; Fitting; Mathematical model; Optimization; Taylor series; Transistors;
Conference_Titel :
Automation Science and Engineering (CASE), 2013 IEEE International Conference on
Conference_Location :
Madison, WI
DOI :
10.1109/CoASE.2013.6653968