• DocumentCode
    2061883
  • Title

    From algorithms to gates: developing a pedagogical framework for DSP hardware design

  • Author

    Hall, Tyson S. ; Anderson, David K.

  • Author_Institution
    Georgia Inst. of Technol., Atlanta, GA, USA
  • fYear
    2002
  • fDate
    13-16 Oct. 2002
  • Firstpage
    157
  • Lastpage
    161
  • Abstract
    In this paper, we present a pedagogical framework for teaching DSP hardware design and provide the necessary technical infrastructure for enabling this methodology. Many curriculums include extensive training in DSP theory and in VHDL modeling of hardware; however, there are few opportunities given to the student to combine these two skills into a working knowledge of DSP hardware design. Our framework allows students to expand their previous knowledge into a more complete understanding of the entire design process from specification and simulation through synthesis and verification.
  • Keywords
    computer science education; digital signal processing chips; electronic engineering education; field programmable gate arrays; hardware description languages; logic CAD; teaching; DSP hardware design; DSP theory; VHDL modeling; digital signal processing; hardware description languages; pedagogical framework; teaching; Algorithm design and analysis; Digital signal processing; Education; Field programmable gate arrays; Hardware; MATLAB; Mathematical model; Prototypes; Signal processing algorithms; Signal synthesis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Digital Signal Processing Workshop, 2002 and the 2nd Signal Processing Education Workshop. Proceedings of 2002 IEEE 10th
  • Print_ISBN
    0-7803-8116-5
  • Type

    conf

  • DOI
    10.1109/DSPWS.2002.1231095
  • Filename
    1231095