DocumentCode
2062250
Title
Quantitative evaluation of three reconfiguration strategies on FPGAs: a case study
Author
Cadens, J.O. ; Megson, G.M. ; Plaks, T.P.
Author_Institution
Dept. of Comput. Sci., Reading Univ., UK
Volume
1
fYear
2000
fDate
14-17 May 2000
Firstpage
337
Abstract
Reconfigurable computing is becoming an important new alternative for implementing computations. Field programmable gate arrays (FPGAs) are the ideal integrated circuit technology to experiment with the potential benefits of using different strategies of circuit specialization by reconfiguration. The final form of the reconfiguration strategy is often non-trivial to determine. Consequently, in this paper, we examine strategies for reconfiguration and, based on our experience, propose general guidelines for the tradeoffs using an area-time metric called functional density. Three experiments are set up to explore different reconfiguration strategies for FPGAs applied to a systolic implementation of a scalar quantizer used as a case study. Quantitative results for each experiment are given. The regular nature of the example means that the results can be generalized to a wide class of industry-relevant problems based on arrays.
Keywords
field programmable gate arrays; reconfigurable architectures; systolic arrays; FPGA reconfiguration strategies; area-time metric; arrays; case study; circuit specialization; field programmable gate arrays; functional density; industry-relevant problems; integrated circuit technology; quantitative evaluation; reconfigurable computing; scalar quantizer; systolic implementation; tradeoffs;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computing in the Asia-Pacific Region, 2000. Proceedings. The Fourth International Conference/Exhibition on
Conference_Location
Beijing, China
Print_ISBN
0-7695-0589-2
Type
conf
DOI
10.1109/HPC.2000.846574
Filename
846574
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