DocumentCode :
2063030
Title :
Improving Annealing via Directed Moves
Author :
Vorwerk, Kristofer ; Kennings, Andrew ; Greene, Jonathan ; Chen, Doris T.
Author_Institution :
Waterloo Univ., Waterloo
fYear :
2007
fDate :
27-29 Aug. 2007
Firstpage :
363
Lastpage :
370
Abstract :
Simulated annealing remains a widely-used heuristic for FPGA placement due, in part, to its ability to produce high-quality placements while accommodating complex objective functions and architectural constraints. In this work, we investigate the concept of "directed moves" during annealing as a means of improving upon the quality and run-time of the technique. We intersperse "intelligent" strategies for selecting and placing cells along with traditional, random moves during an anneal. This allows our annealer to converge more quickly and to attain better-quality placements with less statistical variability. Our results confirm that, for the same amount of computational effort, directed moves achieve 5% and 10% improvement in critical path delay and wire length, respectively, compared to traditional annealing perturbations.
Keywords :
field programmable gate arrays; simulated annealing; FPGA placement; complex objective functions; critical path delay; directed moves; high-quality placements; simulated annealing; Application specific integrated circuits; Costs; Delay; Field programmable gate arrays; Logic; Runtime; Simulated annealing; Temperature; Timing; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications, 2007. FPL 2007. International Conference on
Conference_Location :
Amsterdam
Print_ISBN :
978-1-4244-1060-6
Electronic_ISBN :
978-1-4244-1060-6
Type :
conf
DOI :
10.1109/FPL.2007.4380673
Filename :
4380673
Link To Document :
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