Title :
13.5 A −97dBm-sensitivity interferer-resilient 2.4GHz wake-up receiver using dual-IF multi-N-Path architecture in 65nm CMOS
Author :
Salazar, Camilo ; Kaiser, Andreas ; Cathelin, Andreia ; Rabaey, Jan
Author_Institution :
STMicroelectron., Crolles, France
Abstract :
Wake-up receivers are considered as practical solutions to enable ultra-low-power (ULP) wireless sensor nodes (WSN) in a dense environment. A low data-rate (<;~50kb/s) wake-up receiver (WuRX) should facilitate a long sensor lifetime, optimal network latency and strong interferer resilience. Moreover, such sensor nodes should be ultra-low-cost compact objects. This paper presents a 2.4GHz WuRX with -97dBm sensitivity for 10kb/s and 103 BER, operated from a single 0.5V supply. On-off keying (OOK) modulation has been chosen for its energy efficiency, with a cascaded multilayer N-path filter approach offering superb interferer rejection while avoiding expensive off-chip resonant components such as BAWs or crystals.
Keywords :
CMOS integrated circuits; amplitude shift keying; energy conservation; error statistics; interference suppression; radio receivers; radiofrequency interference; switched filters; wireless sensor networks; BER; CMOS technology; OOK modulation; ULP WSN; WuRX; bit rate 10 kbit/s; dual-IF multi-N-path architecture; energy efficiency; frequency 2.4 GHz; interferer rejection; multilayer N-path filter approach; on-off keying modulation; optimal network latency; sensitivity interferer-resilient wake-up receiver; size 65 nm; ultra low-power wireless sensor node; voltage 0.5 V; CMOS integrated circuits; Filtering; Frequency measurement; Frequency shift keying; Radio frequency; Receivers; Sensitivity;
Conference_Titel :
Solid- State Circuits Conference - (ISSCC), 2015 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4799-6223-5
DOI :
10.1109/ISSCC.2015.7063016
