Multiplexer-Based Routing Fabric for Reconfigurable Logic

A novel routing fabric is introduced that offers high flexibility at significant lower silicon cost compared to routing fabrics currently incorporated in many field programmable gate array (FPGA) devices, IP cores, and IP-core wrappers. The novel fabric is entirely constructed from multiplexers and unidirectional point-to-point connections, controlled by configuration bits, and prove very efficient when mapping applications. For a fabric connecting 4-input look-up-tables, area savings of 60% are demonstrated when routing applications from the MCNC benchmark set.