DocumentCode
2063514
Title
Session 14 overview: Digital PLLs and SoC building blocks: High-performance digital subcommittee
Author
Hill, Anthony ; Hayashi, Hiroo
Author_Institution
Texas Instruments, Dallas, TX
fYear
2015
fDate
22-26 Feb. 2015
Firstpage
250
Lastpage
251
Abstract
The nine papers in this session highlight developments in clock generation, sensors, and security. Digital PLL solutions are presented in FinFET technology, improved power supply noise and jitter, and synthesized fractional-N functionality. Papers in this session also present solutions for on-die power and aging sensors for reliable operation, and address security with innovations in device authentication using physically unclonable functions.
fLanguage
English
Publisher
ieee
Conference_Titel
Solid- State Circuits Conference - (ISSCC), 2015 IEEE International
Conference_Location
San Francisco, CA, USA
Print_ISBN
978-1-4799-6223-5
Type
conf
DOI
10.1109/ISSCC.2015.7063020
Filename
7063020
Link To Document