DocumentCode :
2063712
Title :
Design Considerations and Performance Analysis of Good π-Rotation LDPC Codes
Author :
Echard, Rich ; Chang, Shih-Chun
Author_Institution :
Naval Res. Lab., Washington, DC
fYear :
2006
fDate :
27-29 April 2006
Firstpage :
1
Lastpage :
5
Abstract :
In this paper we present two theoretical results that lead to the development of good π-rotation LDPC codes. The first theorem derives bounds on the weight of the parity vector when the weight of the information vector is two. The second theorem establishes the expected number of short-loops in the parity check matrix. We then present construction tools that are used to reduce the complexity of searching minimum distance and girth for π-rotation LDPC codes. Several performance examples are given
Keywords :
matrix algebra; parity check codes; good π-rotation LDPC codes; parity check matrix; performance analysis; Circuits; Encoding; Equations; Laboratories; Lattices; Parity check codes; Performance analysis; Turbo codes;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wireless Telecommunications Symposium, 2006. WTS '06
Conference_Location :
Pomana, CA
Print_ISBN :
1-4244-0045-7
Electronic_ISBN :
1-4244-0046-5
Type :
conf
DOI :
10.1109/WTS.2006.334543
Filename :
4135347
Link To Document :
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