Wires on Demand: Run-Time Communication Synthesis for Reconfigurable Computing

Author

Athanas, P. ; Bowen, J. ; Dunham, T. ; Patterson, C. ; Rice, J. ; Shelburne, M. ; Surís, J. ; Bucciero, M. ; Graf, J.

Author_Institution

Virginia Tech., Blacksburg

fYear

2007

fDate

27-29 Aug. 2007

Firstpage

513

Lastpage

516

Abstract

In systems typified by software defined radio, existing flows for run-time FPGA reconfiguration limit resource efficiency when constructing a variety of datapaths. Our approach allocates a sandbox region in which modules from a library can be flexibly placed and interconnected. An efficient run-time framework makes use of lightweight placement and routing techniques to respond on-demand to application requests. Compile time tools automate the task of adding interface wrappers to modules, insulating the designer from reconfiguration details.

Keywords

field programmable gate arrays; logic CAD; program compilers; software radio; lightweight placement; program compiler; reconfigurable computing; run-time FPGA reconfiguration; run-time communication synthesis; software defined radio; Application software; Circuit synthesis; Data flow computing; Field programmable gate arrays; Hardware; Integrated circuit interconnections; Routing; Runtime; Software libraries; Wires;

fLanguage

English

Publisher

ieee

Conference_Titel

Field Programmable Logic and Applications, 2007. FPL 2007. International Conference on

Conference_Location

Amsterdam

Print_ISBN

978-1-4244-1060-6

Electronic_ISBN

978-1-4244-1060-6

Type

conf

DOI

10.1109/FPL.2007.4380705

Filename

4380705