Title :
Variation-aware subthreshold logic circuit design
Author :
Fuketa, Hiroshi ; Takahashi, Ryo ; Takamiya, Makoto ; Nomura, M. ; Shinohara, Hirofumi ; Sakurai, Takayasu
Author_Institution :
Inst. of Ind. Sci., Univ. of Tokyo, Tokyo, Japan
Abstract :
Subthreshold logic circuits are one of promising solutions to achieve ultra-low power operation. However, subthreshold circuits are significantly sensitive to manufacturing and environmental variability. In this paper, we will discuss design challenges in subthreshold logic circuits, such as rise in a minimum operating voltage, signal integrity degradation, and large delay variations.
Keywords :
CMOS logic circuits; integrated circuit design; logic design; environmental variability; large delay variations; minimum operating voltage; signal integrity degradation; ultra-low power operation; variation-aware subthreshold logic circuit design; Crosstalk; Delays; Logic circuits; Logic gates; Noise; Temperature measurement; Temperature sensors;
Conference_Titel :
ASIC (ASICON), 2013 IEEE 10th International Conference on
Conference_Location :
Shenzhen
Print_ISBN :
978-1-4673-6415-7
DOI :
10.1109/ASICON.2013.6811842