DocumentCode :
2064148
Title :
REDEFINE: Architecture of a SoC Fabric for Runtime Composition of Computation Structures
Author :
Satrawala, A.N. ; Varadarajan, Keshavan ; Alle, Mythri ; Nandy, S.K. ; Narayan, Ranjani
Author_Institution :
Indian Inst. of Sci., Bangalore
fYear :
2007
fDate :
27-29 Aug. 2007
Firstpage :
558
Lastpage :
561
Abstract :
In this paper we propose the architecture of a SoC fabric onto which applications described in a HLL are synthesized. The fabric is a homogeneous layout of computation, storage and communication resources on silicon. Through a process of composition of resources (as opposed to decomposition of applications), application specific computational structures are defined on the fabric at runtime to realize different modules of the applications in hardware. Applications synthesized on this fabric offers performance comparable to ASICs while retaining the programmability of processing cores. We outline the application synthesis methodology through examples, and compare our results with software implementations on traditional platforms with unbounded resources.
Keywords :
high level languages; integrated circuit layout; logic design; system-on-chip; ASIC; HLL; SoC fabric; application specific computational structures; processing cores; programmability; runtime composition; Application software; Circuit faults; Computer applications; Computer architecture; Data flow computing; Fabrics; Field programmable gate arrays; Hardware; Runtime; Scalability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications, 2007. FPL 2007. International Conference on
Conference_Location :
Amsterdam
Print_ISBN :
978-1-4244-1060-6
Electronic_ISBN :
978-1-4244-1060-6
Type :
conf
DOI :
10.1109/FPL.2007.4380716
Filename :
4380716
Link To Document :
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