Low-complexity synchronizer used in DC-OFDM UWB system

This paper proposes a novel synchronizer consisting of timing synchronization module, automatic gain control, CFO and IQ mismatch compensation. Correlation with threshold search algorithm is used in the timing synchronization module. A double close-loop algorithm is used in the automatic gain control module to improve adjustable range and convergence. What is more, the carrier frequency offset and IQ mismatch is estimated and compensated in the digital compensation module. According to the results of synthesis using 0.13um CMOS process, the proposed synchronizer could achieve the same frequency of 132MHz with only about 50% gate count and power consumption of the traditional synchronizer.