Design of dual-wideband low noise amplifier base on common gate topology

Author

Meng-Ting Hsu ; Po-Yu Lee ; Yu-Zhang Huang

Author_Institution

Dept. & Inst. of Electron. Eng., Nat. Yunlin Univ. of Sci. & Technol., Douliou, Taiwan

fYear

2013

fDate

28-31 Oct. 2013

Firstpage

1

Lastpage

4

Abstract

This paper proposed a active notch filter for an UWB low noise amplifier (LNA) in 0.18μm CMOS process. The measurement of the input and output reflection coefficient S₁₁, S₂₂ are less than -10 dB, the maximum power gain S₂₁ gives 18.7dB, the minimum of the noise figure is 4.8dB, the measured IIP₃ is -8.1dBm at 6GHz. It consumes 6.1mW power consumption from a 1-V supply voltage including the output buffer.

Keywords

CMOS analogue integrated circuits; MMIC amplifiers; active filters; field effect MMIC; low noise amplifiers; notch filters; ultra wideband technology; CMOS process; UWB LNA; active notch filter; common gate topology; dual-wideband low noise amplifier design; frequency 6 GHz; input-output reflection coefficient; output buffer; power 6.1 mW; size 0.18 mum; voltage 1 V; Active filters; CMOS integrated circuits; CMOS technology; Impedance matching; Logic gates; Noise; Semiconductor device measurement; Current-reused; Low noise amplifier(LNA); Notch filter; Ultra-wide band(UWB);

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC (ASICON), 2013 IEEE 10th International Conference on

Conference_Location

Shenzhen

ISSN

2162-7541

Print_ISBN

978-1-4673-6415-7

Type

conf

DOI

10.1109/ASICON.2013.6811869

Filename

6811869