A 24 GHz reconfigurable frequency synthesizer for 60 GHz WPAN

This paper presents the design and experimental measurement of 24 GHz phase-locked loop frequency synthesizer for 60 GHz low power transceiver implemented in 0.18 μm SiGe BiCMOS process. The synthesizer employs a novel architecture with multi-coupled LC tanks for voltage controlled oscillator and injection locked frequency divide-by-2; low loss wideband power splitter and power combiner; reconfigurable divider for both integer and fractional mode of operation with choice of multiple reference frequencies. The synthesizer chip exhibits a locking range of 23.07 GHz to 26.48 GHz with a phase noise of -100.2 dBc/Hz at 1 MHz offset. The fully integrated synthesizer is controlled by slave serial peripheral interface and dissipates 42 mW from a 1.8V supply with external loop filter.