Title :
Design of frequency synthesizer in frequency-hopping transceiver
Author :
Yong Xu ; Fei Zhao ; Chen Hu ; Zheng Sun ; Yuanliang Wu ; Jianwen Lu
Author_Institution :
Inst. of Commun. Eng., PLA UST, Nanjing, China
Abstract :
Several key techniques of PLL-type (Phase-Locked Loop) frequency synthesizer for frequency-hopping transceiver are studied. Its structure is analyzed and the main parameters are proposed. A monolithic LC-tuned voltage controlled oscillator (LC-VCO) with low phase noise is fabricated in a TSMC 0.18μm RF (radio frequency) CMOS technology. The measured phase noise is -118dBc/Hz at 1MHz off the center frequency of 2.5GHz. A down scaling circuit with low power dissipation was fabricated in TSMC 0.18μm mixed-signal CMOS process. The measured results show that the IC can work well under a 1.8V power supply. Its total power dissipation is only 18mA.
Keywords :
CMOS analogue integrated circuits; UHF frequency convertors; UHF integrated circuits; UHF oscillators; frequency hop communication; frequency synthesizers; phase locked loops; phase noise; radio transceivers; voltage-controlled oscillators; IC; LC-VCO; PLL-type frequency synthesizer design; TSMC RF CMOS technology; down scaling circuit; frequency 2.5 GHz; frequency-hopping transceiver; low phase noise; low power dissipation; monolithic LC-tuned voltage controlled oscillator; phase-locked loop; size 0.18 mum; voltage 1.8 V; Frequency synthesizers; Phase locked loops; Phase noise; Power dissipation; Radio frequency; Transceivers; Voltage-controlled oscillators; Dual-Modulus Prescaler; Frequency-Hopping; PLL; VCO;
Conference_Titel :
ASIC (ASICON), 2013 IEEE 10th International Conference on
Conference_Location :
Shenzhen
Print_ISBN :
978-1-4673-6415-7
DOI :
10.1109/ASICON.2013.6811882
