DocumentCode
2065271
Title
Caching in Real-Time Reconfiguration Port Scheduling
Author
Dittmann, Florian ; Frank, Stefan
Author_Institution
Paderborn Univ., Paderborn
fYear
2007
fDate
27-29 Aug. 2007
Firstpage
740
Lastpage
744
Abstract
In reconfigurable systems, the concept of caching configurations can be employed to reduce the reconfiguration overhead, as already loaded configurations can be reused. In case reconfigurable systems are resources for real-time systems, caching may even improve schedulability, as tasks can be executed immediately. The real-time reconfiguration port scheduling of this work combines mono processor scheduling algorithms and parallel slot execution, which particularly allows us to benefit from caching. However, a comprehensive design of methods is required. We discuss concepts for introducing caching to this new way of real-time scheduling on partially reconfigurable devices.
Keywords
cache storage; field programmable gate arrays; processor scheduling; reconfigurable architectures; caching configuration; monoprocessor scheduling algorithms; parallel slot execution; port scheduling; real-time systems; reconfigurable devices; reconfigurable systems; schedulability; Design methodology; Embedded system; Fabrics; Field programmable gate arrays; MONOS devices; Processor scheduling; Real time systems; Reconfigurable architectures; Scheduling algorithm; Time sharing computer systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Field Programmable Logic and Applications, 2007. FPL 2007. International Conference on
Conference_Location
Amsterdam
Print_ISBN
978-1-4244-1060-6
Electronic_ISBN
978-1-4244-1060-6
Type
conf
DOI
10.1109/FPL.2007.4380758
Filename
4380758
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