DocumentCode :
2065507
Title :
A CMOS PGA with DCOC and I/Q mismatch calibration
Author :
Xingpeng Pan ; Rui Guan ; Dongpo Chen
Author_Institution :
Center for Analog/RF Integrated Circuits, Shanghai Jiao Tong Univ., Shanghai, China
fYear :
2013
fDate :
28-31 Oct. 2013
Firstpage :
1
Lastpage :
4
Abstract :
A programmable gain amplifier (PGA) with DC-offset cancellation (DCOC) and I/Q gain and phase mismatch calibration is proposed in this paper. It achieves a gain tuning range of 9dB to 27dB with 6dB per step and a 30MHz bandwidth. DC negative feedback technique is adopted in the design of DCOC, while the gain mismatch calibration can be implemented in the first stage of PGA using variable resistor calibration and the phase mismatch calibration can be implemented in the second stage of PGA using feed through resistor calibration. Designed and simulated in a 0.18um CMOS process, the proposed PGA has a DC gain of -1dB, and after mismatch calibration, it has a gain error less than 0.1dB and a phase error less than 0.25 deg between I and Q.
Keywords :
CMOS analogue integrated circuits; amplifiers; integrated circuit design; CMOS programmable gain amplifier; DC-offset cancellation; DCOC; I/Q mismatch calibration; feed through resistor calibration; frequency 30 MHz; gain 9 dB to 27 dB; phase mismatch calibration; size 0.18 mum; variable resistor calibration; DCOC; I/Q mismatch; PGA;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC (ASICON), 2013 IEEE 10th International Conference on
Conference_Location :
Shenzhen
ISSN :
2162-7541
Print_ISBN :
978-1-4673-6415-7
Type :
conf
DOI :
10.1109/ASICON.2013.6811902
Filename :
6811902
Link To Document :
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