• DocumentCode
    2065810
  • Title

    24.1 Circuit challenges from cryptography

  • Author

    Verbauwhede, Ingrid ; Balasch, Josep ; Roy, Sujoy Sinha ; Van Herrewege, Anthony

  • Author_Institution
    KU Leuven, Leuven, Belgium
  • fYear
    2015
  • fDate
    22-26 Feb. 2015
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    Implementing cryptography and security into integrated circuits is somehow similar to applications in other fields. We have to worry about comparable optimization goals: area, power, energy, throughput and/or latency. Moore\´s law helps to attain these goals. However, it also gives the attackers more computational power to break cryptographic algorithms. On top of this, quantum computers may become soon a reality, so that novel, very computationally demanding "post-quantum" cryptographic algorithms need implementation. Finally, there is a third dimension to the problem: implementations have to be resistant against physical attacks and countermeasures increase the cost. This paper demonstrates with actual data how these conflicting challenges are being addressed.
  • Keywords
    optimisation; quantum computing; quantum cryptography; Moore law; circuit challenges; cryptographic algorithms; cryptography; integrated circuit security; optimization goals; quantum computers; CMOS integrated circuits; Cryptography; Field programmable gate arrays; Polynomials; Random access memory; Resistance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid- State Circuits Conference - (ISSCC), 2015 IEEE International
  • Conference_Location
    San Francisco, CA
  • Print_ISBN
    978-1-4799-6223-5
  • Type

    conf

  • DOI
    10.1109/ISSCC.2015.7063109
  • Filename
    7063109