DocumentCode :
2066243
Title :
Overflow handling in inner-product processors
Author :
Elguibaly, F. ; Rayhan, A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Victoria Univ., BC, Canada
Volume :
1
fYear :
1997
fDate :
20-22 Aug 1997
Firstpage :
117
Abstract :
Several DSP applications demand high speed inner-product processors (IPP). Most current implementations of IPP use the multiply-accumulate (MAC) concept to perform the IP operations. Rather than using MAC accumulate to perform the IP operation, the authors show two superior designs, MIPP and CSIPP, that outperform the standard implementations. The speed improvement ratio is estimated to be between 2 to 4 for both designs. The paper also presents a new technique to detect and correct overflow occurrence in MIPP and CSIPP
Keywords :
digital signal processing chips; signal processing; CSIPP; DSP applications; MIPP; high speed inner-product processors; multiply-accumulate concept; overflow handling; overflow occurrence correction; overflow occurrence detection; speed improvement ratio; Adders; Algorithm design and analysis; Application software; Delay; Design optimization; Digital filters; Digital signal processing; Filtering algorithms; Hardware; Iterative algorithms;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Computers and Signal Processing, 1997. 10 Years PACRIM 1987-1997 - Networking the Pacific Rim. 1997 IEEE Pacific Rim Conference on
Conference_Location :
Victoria, BC
Print_ISBN :
0-7803-3905-3
Type :
conf
DOI :
10.1109/PACRIM.1997.619915
Filename :
619915
Link To Document :
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