Timing and resource constrained leakage power aware scheduling in high-level synthesis

In this paper, we address the problem of scheduling operations into proper control steps with dual threshold voltage techniques under timing and resource constraints. Our work first remove operations´ mobility overlaps to eliminate the data dependencies, and a simulated-annealing based method then explores the optimal mobility overlap removal. For each mobility overlap removal solution, operations are initialized with a proper threshold voltage (V_th), and then scheduled averagely at each control step, which usually violates the resource constraints. A weighted interval scheduling model is built, and the set of maximum weighted operations whose mobilities do not share the same control step are selected and reassigned with low-V_th, until the resource constraints are met. The reassigned operations need to be rescheduled since their threshold voltages are changed. This procedure is repeated until all the operations are scheduled and resource constraints are satisfied. Experimental results show the proposed algorithm´s effectiveness.