Design Methodology of Regular Logic Bricks for Robust Integrated Circuits

Regularity in IC design has been recognized as an effective means to combat variability in nanoscale technologies. One way to enforce design regularity is to implement ICs using a small library of regular logic bricks. In this paper we propose a methodology for the design and synthesis of such logic bricks. Since logic bricks are comprised of a limited set of logic primitives for manufacturability reasons, we propose a primitive-based direct mapping approach for generating optimized bricks that, in contrast to classical synthesis approaches, can provide direct control of implementation structures at abstract functional level based on the detection of natural decompositions that exist in the function. We demonstrate considerable improvement in the performance of logic bricks that are generated by the proposed method as compared with those produced by a commercial synthesis tool.