Title :
Deep sub-micron IDDQ test options
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
Abstract :
The problem of pass/fail decision making with IDDQ testing will become increasingly difficult as the feature size and voltage are reduced in deep sub-micron regions due to increased transistor sub-threshold leakage currents. The off current of minimum sized devices is expected to increase at least by a factor of 100 as the feature size is reduced from 0.5 micron to 0.1 micron. The increase in transistor off current with ULSI complexity will have a significant impact on the future ofIDDQ testing
Keywords :
CMOS integrated circuits; ULSI; failure analysis; integrated circuit testing; leakage currents; 0.1 m to 0.5 micron; IDDQ test; ULSI complexity; deep sub-micron devices; feature size; pass/fail decision making; transistor off current; transistor sub-threshold leakage currents; Testing;
Conference_Titel :
Test Conference, 1996. Proceedings., International
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-3541-4
DOI :
10.1109/TEST.1996.557171
