DocumentCode :
2066610
Title :
27.7 A 0.05mm2 1V capacitance-to-digital converter based on period modulation
Author :
Yuming He ; Zu-yao Chang ; Pakula, Lukasz ; Shalmany, Saleh Heidary ; Pertijs, Michiel
Author_Institution :
Delft Univ. of Technol., Delft, Netherlands
fYear :
2015
fDate :
22-26 Feb. 2015
Firstpage :
1
Lastpage :
3
Abstract :
This paper presents a digitally assisted period modulation (PM)-based capacitance-to-digital converter (CDC) that is >9× smaller than prior CDCs with >10b resolution [1-4], and improves the energy efficiency by >10× compared to previous PM-based CDCs [1]. This is achieved with the help of a piece-wise charge transfer technique that eliminates the need for a large on-chip integration capacitor, a dual-integration-capacitor scheme that reduces the front-end noise contribution, a sampled-biasing technique that reduces the noise of the integration current, and a current-efficient inverter-based design.
Keywords :
CMOS integrated circuits; capacitance; invertors; modulation; power convertors; reference circuits; capacitance-to-digital converter; current-efficient inverter-based design; digitally assisted period modulation; dual-integration-capacitor scheme; front-end noise contribution; on-chip integration capacitor; piecewise charge transfer technique; sampled-biasing technique; voltage 1 V; Capacitance; Capacitive sensors; Capacitors; Charge transfer; Noise; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid- State Circuits Conference - (ISSCC), 2015 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4799-6223-5
Type :
conf
DOI :
10.1109/ISSCC.2015.7063138
Filename :
7063138
Link To Document :
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