Building-in reliability in BCD (Bipolar-CMOS-DMOS) technologies

Author

Jifa Hao ; Kopley, T.E.

Author_Institution

Fairchild Semicond., South Portland, ME, USA

fYear

2013

fDate

28-31 Oct. 2013

Firstpage

1

Lastpage

4

Abstract

This paper discusses the “Building-In Reliability” (BIR) approach to process development, particularly for technologies integrating Bipolar, CMOS, and DMOS devices (so-called BCD technologies). Examples of BIR reliability assessments include gate oxide integrity (GOI) through Time-Dependent Dielectric Breakdown (TDDB) studies and degradation of laterally diffused MOS (LDMOS) devices by Hot-Carrier Injection (HCI) stress. TDDB allows calculation of gate oxide failure rates based on operating voltage waveforms and temperature. HCI causes increases in LDMOS resistance (Rdson), which decreases efficiency in power applications.

Keywords

BIMOS integrated circuits; MIS devices; integrated circuit reliability; semiconductor device breakdown; BIR reliability assessments; LDMOS devices; bipolar-CMOS-DMOS technologies; building-in reliability; failure rates; gate oxide integrity; hot-carrier injection stress; laterally diffused MOS degradation; operating voltage waveforms; time-dependent dielectric breakdown; Degradation; Human computer interaction; Logic gates; Reliability engineering; Semiconductor device reliability; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC (ASICON), 2013 IEEE 10th International Conference on

Conference_Location

Shenzhen

ISSN

2162-7541

Print_ISBN

978-1-4673-6415-7

Type

conf

DOI

10.1109/ASICON.2013.6811954

Filename

6811954