• DocumentCode
    2066834
  • Title

    Two sides of pulse quenching effect on the single-event transient pulse width at circuit-level

  • Author

    Bin Liang ; Yankang Du

  • Author_Institution
    Coll. of Comput., Nat. Univ. of Defense Technol., Changsha, China
  • fYear
    2013
  • fDate
    28-31 Oct. 2013
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Pulse quenching effect is evaluated at circuit-level. Simulation results present that pulse quenching effect is not always beneficial to mitigate single-event transient (SET) pulse width. It also could increase the SET pulse width.
  • Keywords
    integrated circuit reliability; integrated circuit testing; radiation hardening (electronics); circuit level evaluation; pulse quenching effect; single event transient pulse width; Benchmark testing; Circuit topology; Combinational circuits; Reliability; Simulation; Standards; Transient analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC (ASICON), 2013 IEEE 10th International Conference on
  • Conference_Location
    Shenzhen
  • ISSN
    2162-7541
  • Print_ISBN
    978-1-4673-6415-7
  • Type

    conf

  • DOI
    10.1109/ASICON.2013.6811956
  • Filename
    6811956
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2066834