Title :
A cost-effective method for masking transient errors in NoC flit type
Author :
Jiajia Jiao ; Yuzhuo Fu
Author_Institution :
Sch. of Micro Electron., Shanghai Jiao Tong Univ., Shanghai, China
Abstract :
In the paper, we exploit the inherent status information of Network on Chip (NoC) routers to manage transient errors in the flit type. The proposed solution significantly reduces extra 2× cost of the flit type field over Triple Modular Redundancy (TMR). Its analytical model is given to predict the efficiency. The simulation results show its throughput recovery rate is up to 61.21% over no protection case, while the throughput recovery rate per area achieves 2.13× over TMR.
Keywords :
masks; network routing; network-on-chip; NoC flit type field; TMR; masking transient error management; network on chip router; triple modular redundancy; Analytical models; Error analysis; Reliability; Routing; Throughput; Transient analysis; Tunneling magnetoresistance; NoC; flit type; transient error;
Conference_Titel :
ASIC (ASICON), 2013 IEEE 10th International Conference on
Conference_Location :
Shenzhen
Print_ISBN :
978-1-4673-6415-7
DOI :
10.1109/ASICON.2013.6811961