DocumentCode
2067004
Title
Digital calibration techniques for interstage gain nonlinearity in pipelined ADCs
Author
Chaojie Fan ; Wenjie Pan ; Ke Wang ; Jianjun Zhou
Author_Institution
Center for Analog/RF IC, Shanghai Jiao Tong Univ., Shanghai, China
fYear
2013
fDate
28-31 Oct. 2013
Firstpage
1
Lastpage
4
Abstract
Main digital calibration techniques for interstage gain nonlinearity in low-power, high-speed pipelined analog to digital converter (ADC) designs published in recent years are overviewed in this paper. Two novel digital calibration techniques are proposed and compared with other main digital calibration techniques in terms of the efficiency, convergence time, complexity, limitations, and cost.
Keywords
analogue-digital conversion; calibration; low-power electronics; digital calibration techniques; interstage gain nonlinearity; low-power high-speed pipelined analog to digital converter design; pipelined ADCs; Calibration; Capacitors; Equations; Mathematical model; Noise; Parallel processing; Quantization (signal); Convergence time; Digital Back-ground Calibration; Interstage Gain Nonlinearity; Pipelined Analog to Digital Converter (ADC); Pseudo-Random Signal;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC (ASICON), 2013 IEEE 10th International Conference on
Conference_Location
Shenzhen
ISSN
2162-7541
Print_ISBN
978-1-4673-6415-7
Type
conf
DOI
10.1109/ASICON.2013.6811962
Filename
6811962
Link To Document